Integrated circuits are typically fabricated on a semiconductor wafer, with many individual dies manufactured simultaneously on the same wafer. Processing steps are used to form layers of metal and dielectrics on the semiconductor wafer to define interconnect structures, as well as active and passive electronic devices. Many of the processing steps result in non-planar layers. However, it is often desirable for layers of the integrated circuit to have uniform thickness. Thus, polishing is required both to provide uniform thickness, and a smooth layer surface, which not only ensure device performance, but also aid subsequent processing steps.
Polishing techniques include mechanical planarization (MP) and chemical mechanical planarization/polishing (CMP). A typical CMP system will include a large polishing pad, on which a chemical slurry is introduced to facilitate wafer polishing, and a polishing head. To polish a semiconductor wafer, the semiconductor wafer is held by the polishing head, and the polishing head simultaneously applies a force to press the semiconductor wafer against the rotating polishing pad, while also rotating the semiconductor wafer.